The modern automobile has developed in a remarkable manner over the past decade — a reflection of effective competition between manufacturers, rising customer expectations, and tighter environmental legislation. As vehicle manufacturers strive to differentiate their products and create increased end user demand, today’s vehicles are being transformed into a mobile entertainment environment on the weekend.

In response to this consumer demand, a trend toward designing scalable platforms that can be used across many vehicle models is emerging within the automotive industry. For example, one PC board or platform system could be used for low-end, mid-range, and high-end “infotainment” systems with only specific parts populated or enabled. This concept not only offers the ability to reduce costs by manufacturing and qualifying one board type, but also potentially reduces inventory costs. This approach has had an impact at the system level and designers are now re-thinking what device level choices are required to enable scaleable and reconfigurable platforms.

By integrating a wide range of disparate technologies, including GPS, entertainment, wireless communication, information appliances, and Internet access, telematics holds the promise of being able to improve the safety, comfort, and convenience of the automotive driving experience. Because of these promises, automotive telematics has become one of the fastest growing segments in the semiconductor market.

More than 20 years ago, the revolutionary concept of a “foundry on the desktop” was founded. The idea was simple — by creating a customizable logic device based upon SRAM technology, a logic designer could literally develop custom logic devices directly on his desktop, doing away with the high upfront costs and long development cycles typically associated with ASICs. This revolutionary product, known today as a programmable logic device (PLD), has grown to become a ubiquitous technology, catalyzing the rapid growth of a wide range of new markets and applications.

According to IMS Research, the PLD TAM in the automotive market for in-car audio, infotainment and driver information/telematics is expected to reach $449.3 million by 2010.

As semiconductor technology continues to advance, manufacturers have continually driven down costs and increased the performance through the use of advanced process technologies such as 90 nm, and increased wafer sizes such as 300 mm. This reduction in cost has also played a key role in expanding the market and applications benefiting from PLDs. One of the latest and exciting applications to benefit from the flexibility of PLDs is automotive telematics.

Programmable logic devices provide a much faster design cycle than traditional ASICs and incur no non-recurring engineering (NRE) charges. Soaring ASIC development costs, along with increased risk associated with new process technologies, is opening the door for PLDs into the system-on-a-chip (SoC) design realm, previously dominated by ASICs.

PLDs offer the flexibility designers need to deal with current and evolving SoC applications. By combining high-performance, high-density programmable logic with extensive embedded memory resources, DSP blocks, and flexible high-speed I/O into a single chip, these devices serve as a starting point, or platform, that engineers customize to implement unique logic functions.

The trend in decreasing ASIC design and an increase in PLD design over time is well established in industry analyst reports from iSupply and Gartner Dataquest. Next-generation platform PLD devices based on 90 nm have greatly expanded high-performance processing and system integration options and continue to push ASIC design starts lower as additional application solutions are defined.

Because of the many standards, concepts, and technologies continually introduced into the automotive world, the industry is plagued with the risk of obsolescence or delayed deployment as they await finalization. As vehicles evolve into a truly networked arena, equipment manufacturers must determine which standard will be the most successful or offer the greatest advantage over other network protocols.

Enter PLDs — the real benefit of using a reprogrammable architecture is that it allows designers to precisely match interfaces and peripherals to the system requirements

particularly useful when trying to interface with protocols in the early stages of development. When trying to get a product to market quickly, a chipset or ASIC re-spin would be both costly and time-consuming. With a PLD, if the specification of a network protocol changes during a standard’s early days, all it takes to support the latest revision is a relatively simple redesign in software and a download of the new hardware configuration.

Today’s PLD suppliers are demonstrating their commitment to serving the automotive market, by offering temperature-tolerant packaging of -40° to +125°C, and striving to meet the stringent requirements of the automotive industry including ISO TS16949 certification, AEC-Q100 qualification flow, and the Production Part Approval Process (PPAP). This allows automotive engineers to meet their challenging design goals with complete confidence in component quality and performance, while providing the ability to respond quickly to constantly changing automotive and multimedia standards and protocols.

Automotive design has always been a challenging environment when faced with small-form-factor ECU specifications, wide temperature ranges, high-quality and reliability requirements, and low cost points. Today's designs also need to be flexible, upgradeable, and easy to test. With PLDs, today’s vehicle manufacturers can stock one general purpose device in lieu of many application specific parts, thus reducing inventory overhead. Because the chips are reprogrammable at any point throughout the design cycle, automotive engineers can quickly and easily integrate the latest entertainment and navigation systems.

David Gamba has more than eight years of experience in the semiconductor industry where he served in a variety of engineering and market roles. He holds a bachelor's degree in electrical engineering from UCLA, a master’s degree in electrical engineering and computer science from UC Berkeley, and an MBA degree from Stanford University. He currently works for the Vertical Markets Group at Xilinx, 2100 Logic Dr., San Jose, CA 95124. More information is available at www.xilinx.com, or by calling 408-559-7778.