Product Design & Development

Low Jitter

Friday, June 12, 2009
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Low Jitter

Analog Devices (ADI) (Norwood, MA) announces the 6- and 12-channel, compact clock buffers for high-speed applications requiring low jitter. ADI’s 12-channel ADCLK954 LVPECL and ADCLK854 LVDS/CMOS and 6-channel ADCLK946 LVPECL and ADCLK846 LVDS clock fanout buffers provide up to four times as many clock channels on a single chip. Features include:  

  • Jitter from 75 fs (LVPECL) to 100 fs (LVDS).
  • A low 9-ps skew (ADCLK9xx).
  • 24 CMOS channels (ADCL854).
  • 2 selectable differential inputs equipped with 100-ohm on-chip termination resistors (ADCLK954).
  • A timing performance at 100-fs jitter (ADCLK854 and ADLCK846).
  • A low power of 12-mW per channel @ 100-MHz operation.
  • 2 selectable inputs with sleep-mode (ADCLK853).

For more information visit www.analog.com

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