 The STC5230 from Connor-Winfield is a single chip solution of timing source in SDH, SONET, and Synchronous Ethernet network elements. |
The STC5230 from Connor-Winfield is a single chip solution of timing source in SDH, SONET, and Synchronous Ethernet network elements. According to the company, the device exhibits:
- Usability for SDH SETS, SONET Stratum 3, 4E, 4 and SMC, and Synchronous Ethernet.
- 2 timing generators, T0 and T4, for SETS.
- Compliance with ITU-G.813, Telcordia GR1244, and GR253.
- Support of Master/Slave redundant application with the SyncLink™ cross-couple data links.
- Acceptance of 12 individual clock reference inputs.
- Automatic frequency detection of reference clock inputs; each is monitored for quality.
- Support of manual and automatic reference selection.
- Independent reference lists on the T0 and T4 and priority tables for automatic reference selection.
- Output 9 synchronized clocks.
- Ability to compensate the phase delay of the cross-couple links, in 0.1ns steps up to 409.5ns.
- Capability to trace the round-trip phase delay of the master/slave cross-couple links.
- Hit-less reference and master/slave switching.
- Phase rebuild on re-lock and reference switches.
- Programmable loop bandwidth of each DPLL of the T0 and T4 timing generator, from 90 mHz to 107Hz.
- Support of SPI bus interface.
- Field upgrade capability.
- IEEE 1149.1 JTAG boundary scan.
- Availability in TQ100 package.
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