 According to Ziptronix CEO Dan Donabedian, the company is uniquely positioned to deliver the low temperature IC bonding process that the semiconductor industry needs to make true 3D IC integration a practical reality. |
Morrisville, NC – As the semiconductor industry explores the most effective way to implement true 3D integration of advanced semiconductors, Ziptronix is developing strategies for licensing its patented ZiBond and Direct Bond Interconnect (DBI) technologies across the semiconductor supply chain.
By licensing the Ziptronix technology, semiconductor manufacturers can quickly achieve high throughput, wafer-to-wafer or chip-to-wafer low temperature oxide bonding at the lowest cost of operation for 3D IC integration.
Ziptronix, Inc., based in Research Triangle Park, NC, is a leader in IP for innovative 3D integration technology for advanced CMOS ICs, with established patent protection for its ZiBond low temperature covalent bonding (US Patent 7,387,944) and DBI direct bond interconnect (US Patent 6,962,835) technologies.
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According to Ziptronix CEO Dan Donabedian, the company is uniquely positioned to deliver the low temperature IC bonding process that the semiconductor industry needs to make true 3D IC integration a practical reality.
“We’re currently engaged in substantive licensing discussions with customers in multiple market segments at all levels in the semiconductor supply chain, and we anticipate that several license agreements will be reached in the coming months.”
Donabedian explained that the Ziptronix process IP delivers important competitive advantages, and hence, increased value, at each link in the current supply chain.
“Our patented bonding and interconnect technologies can be implemented at all levels of the semiconductor supply chain with little additional capital expenditure for new process equipment. In most cases, the Ziptronix technologies can be employed with slight modifications of existing tools.”
“The OEM/IDM customers and fabless semiconductor manufacturers can now begin to develop device designs that use true 3D integration to achieve more functionality through building multilayer chips, instead of relying on traditional 2D device scaling,” he says.
“In turn, semiconductor foundries will now be able to provide their customers a high volume, high throughput wafer-to-wafer bonding process without compromising yields. And the OSATs vendors will have a repeatable, reliable method of wafer-to-wafer and die-to-wafer bonding for constructing specialized electronic modules using silicon wafers as their substrate material.”
In addition, Donabedian anticipated that both EDA vendors and semiconductor processing tool manufacturers would license the Ziptronix technology to enable their products to implement 3D integration as it is being adopted by the IDMs, chip designers and foundries.
The company is operating from a strong base of intellectual property relating to 3D IC integration, particularly in bonding technology.
“Ziptronix has developed significant worldwide patents covering the basic concepts of low temperature oxide bonding,” Donabedian says.
“Because of the depth and breadth of our patent portfolio, we believe that virtually any use of low temperature oxide bonding processes is likely to be covered by one or more of our patents.”